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Yamaha HTR-5940BL Service Manual Page 70

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BCDEFGH I JK
L MN
RX-V459/HTR-5940/HTR-5935/DSP-AX459
70
★ All voltages are measured with a 10MΩ/V DC electronic volt meter.
★ Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
DSP 2/3
DIGITAL IN
ANALOG IN
PL/PR
FL/FR
SBL/SBR
C/SW
SL/SR
0.1
5.0
0
4.0
0
4.9
0.3
0
4.9
0.3
0
4.9
2.4 2.4 0.6
5.0
0
04.90
04.90
0.1
0
0
0.3
0
3.3
0.3
0.6
0
3.3
0
4.0
3.3
3.3
3.3
0
0
3.3
1.6
1.5
1.7
3.3
0
0
3.1
1.3
1.3 3.1
0
3.1
0
3.3 5.0
3.3 5.0
0
0
3.3
0
1.7
0
3.3
1.7
0
1.7
0
0
3.3
0
3.3
0
5.0
3.2
0.1
3.1
0.9
3.3
0.6
5.0
0.9
3.5
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
0.50
5.00
0
0.1
3.1
3.2
0
0.1
0.1
0.1
0.1
0
3.3
3.3
0
0.5
0.1
5.0
0
5.0
5.0
5.0
3.3
3.3
0
0
0
0
1.7
0.1
0
0
0
0
1.2
1.7
3.3
0
1.7
0
3.3
0
1.2
1.7
0
3.3
1.2
0
0
0
1.2
0
3.3
3.3
3.3
0
3.3
3.3
1.2
3.3
3.3
0
0
0
0
0
3.3
3.3
1.2
3.3
0
3.3
0
3.3
0
3.3
0.4
3.3
0.1
1.2
0.1
0.1
0
3.0
1.6
1.2
1.8
0
3.3
2.8
2.9
0
1.2
0.1
0.1
0.1
3.3
3.3
3.3
2.9
0
0.1
3.3
0.1
1.2
0.1
0.2
0
0.2
3.3
0.1
0.2
1.2
0
0.1
0.1
1.2
0.2
0.2
0.1
3.3
0
0.2
0.2
1.2
0.2
2.9
3.3
0
1.7
3.3
0
1.7
0
1.7
1.7
0
1.7
0
0
3.3
0
0
0
1.2
0.1
1.3
0
1.2
3.1
0.9
3.3
0
1.2
3.3
3.3
0.4
0
1.7
1.7
1.7
0
0.5
3.3
3.3
3.3
0
3.3
0.2
0.1
0
0.2
0.2
3.3
0.2
0
0.1
0.1
0.1
3.3
2.9
3.3
3.3
3.3
0
3.3
0.4
0.1
0.1
0.1
3.0
3.3
0
0.1
0.1
0
0.2
0.2
3.3
0.1
0
0.2
0.2
0.2
3.3
2.9
1.7
3.3
0.1
0.1
2.9
2.8
1.8
1.6
0
0.1
0
0
0.1
0.4
0.1
0.1
2.9
3.3
3.3
0
0
2.8
1.8
1.6
3.0
0.1
0.1
0.1
0
3.3
0
0.1
0.1
0.1
0.1
0.1
0.2
0.2
0.2
3.3
0.1
0.2
0.2
0.2
0.2
0.1
0.2
0.2
3.3
0
3.3
3.3
A-2
00
0
5.4
0.1
0.1
0
0
0
0
0.2
0.2
0.2
0.2
1.8
1.8
1.8
0
0
0
3.5
3.5
3.3
3.5
1.5
1.5
1.5
1.5
0
0
0
3.5
3.5
3.5
3.5
3.5
3.5
3.5
0
0
0
0
0
1.9
1.8
0.2
A-1
DSP
XMDT
DIR
BUFFER
16M SDRAM 4M ROM
SELECTOR
S29AL004D70TF1020
No replacement part available.
サービス部品供給なし
IC54 : NJM2885DL1-33
Low dropout voltage regulator
Thermal
Protection
Bandgap
Reference
V
OUT
V
IN
GND
13
2
4B13
4A12
4Y11
3B10
3A9
3Y8
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
IC63 : SN74AHCT08PWR
Quadruple 2-input positive-AND gates
Vcc141A 1
Y4
B2
GND 3
IC61, 62 : SN74AHCT1G32DCKR
Single 2-input positive-OR gate
Vcc5A1
IC64 : W9816G6CH -7
512K x 2 banks x 16 bits SDRAM
CLOCK
BUFFER
ADDRESS
BUFFER
CLK 35
18
CKE 34
A10 20
CS
17RAS
16CAS
15WE
21A0
∼
24A3
27A4
∼
32A9
19BA
2 DQ0
3 DQ1
5 DQ2
6 DQ3
8 DQ4
9 DQ5
11 DQ6
12 DQ7
39 DQ8
40 DQ9
42 DQ10
43 DQ11
45 DQ12
46 DQ13
48 DQ14
49 DQ15
14 LDQM
36 UDQM
COMMAND
DECODER
REFRESH
COUNTER
REFRESH
COUNTER
DQ
BUFFER
COLUMN
COUNTER
MODE
REGISTER
CONTROL
SIGNAL
GENERATOR
CELL ARRAY
BANK #0
R
O
W
D
E
C
O
D
E
R
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #1
R
O
W
D
E
C
O
D
E
R
COLUMN DECODER
SENSE AMPLIFIER
IC52 : SN74LVU04APWR
Hex inverters
1A
1Y
2Y
VCC
6A
1
2
3
4
11
2A 6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7
4Y8
9
10
GND
1
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
Vcc
OE
B1
B2
B3
B4
B5
B6
B7
B8
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IC65 : SN74LV245APWR
Octal bus transceiver with 3-state outputs
Input
Selector
RXOUT
RX0
RX1
RX2
RX3
RX4
RX5/VI
RX6/UI
LPF
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
Cbit, Ubit
Microcontroller
I/F
Data
Selector
Clock
Selector
Modulation
&
Parallel Port
PLL
XIN XOUT XMCK CKST
SLRCK
SBCK
RLRCK
RBCK
RMCK
SDIN
RDATA
RERR
DO
XMODECICECLINTAUDIO/VOEMPHA/UO
1/N
Demodulation
&
Lock detect
1
2
3
4
5
8
9
10
13
44
45
46
47
48
29 28 27 34
23
22
20
17
16
24
21
36
37
41383948353332
IC56 : LC89057W-VF4A-E
Digital audio interface transceiver
IC53 : R1172S121D-E2-F
Power supply
VDD
CE
Vref
Current Limit
VOUT
GND
2
3
5
6
11
10
14
13
15
1
G
A/B
4B
4A
3B
3A
2B
2A
1B
1A
4
7
9
12
1Y
2Y
3Y
4Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A/B
1A
1B
1Y
2A
2B
2Y
GND
V
CC
G
4A
4B
4Y
3A
3B
3Y
IC58 : SN74LV157APWR
Quadruple 2-line to 1-line data selectors/multiplexers
Y4
B2
GND 3
IC59 : SN74AHC1G08DCKR
2-input positive-AND gate
Vcc5A1
POINT A-2 Pin 29 of IC56POINT A-1 Pin 28 of IC55
IC66 : S29AL004D70TF1020
4M-bit COMS 3.0 volt-only boot sector flash memory
A1
A15
NC
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
A17
A7
A6
A5
A4
A3
A2
1
16
2
3
4
5
6
7
8
17
18
19
20
21
22
23
24
9
10
11
12
13
14
15
A16
DQ2
BYTE#
V
SS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ9
DQ1
DQ8
DQ0
OE#
V
SS
CE#
A0
DQ5
DQ12
DQ4
V
CC
DQ11
DQ3
DQ10
48
33
47
46
45
44
43
42
41
40
39
38
37
36
35
34
25
32
31
30
29
28
27
26
In put / Out put
Buff ers
X- Decoder
Y-De coder
Chip Enab le
Out put Enable
Logi c
Erase V olt ag e
Gener ator
PGM Vo lt ag e
Generator
Tim er
V
CC
De tector
State
Contr ol
Comm and
Regist er
V
CC
V
SS
WE#
BYTE#
CE#
OE#
STB
STB
DQ0–DQ15 (A- 1)
Sect or Sw itc hes
RY/ BY#
RESET#
Data
Lat ch
Y- Gating
Cell M atrix
Addr ess La tch
A0– A17
100/16
100/16
100/16
&6
XM
Page view 69
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