Yamaha HTR-5940BL Service Manual download pdf (Page 48)

48

RX-V459/HTR-5940/DSP-AX459

HTR-5935

RX-V459/HTR-5940/DSP-AX459

HTR-5935

IC60 : D70YE101RFP250 (DSP P.C.B)

Decoder/Post Processor

1

2

3

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5

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7

8

9

10

11

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16

17

18

19

20

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38

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40

41

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43

44

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50

51

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53

54

55

Ground(Vss)

AHCLKX0/AHCLKX2

AMUTE0

AMUTE1

AHCLKX1

Ground(Vss)

ACLKX1

Core Supply (CVpp)

ACLKR1

IO Supply (DVpp)

AFSX1

AFSR1

Ground(Vss)

RESET

Ground(Vss)

Core Supply (CVpp)

CLKIN

Ground(Vss)

TMS

Core Supply (CVpp)

TRST

OSCVss

OSCIN

OSCOUT

OSCVpp

Ground(Vss)

PLLHV

TDI

TDO

Ground(Vss)

IO Supply (DVpp)

EMU[0]

Core Supply (CVpp)

EMU[1]

TCK

Ground(Vss)

EM_CAS

EM_WE

EM_WE_DQM[0]

Ground(Vss)

EM_D[7]

IO Supply (DVpp)

EM_D[6]

Core Supply (CVpp)

EM_D[5]

EM_D[4]

Ground(Vss)

EM_D[3]

EM_D[2]

IO Supply (DVpp)

EM_D[1]

EM_D[0]

Core Supply (CVpp)

Ground(Vss)

EM_D[15]

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

PWR

IO

O

PWR

PWR

IO

OZ

IO

IO

IO

O

O

O

IO

IO

IO

IO

IO

IO

IO

IO

IO

-

-

-

-

-

-

-

-

-

-

IPU

IPU

-

-

-

-

-

IPU

IPU

IPU

IPU

IPU

-

-

-

-

-

-

-

-

-

-

-

-

Y

Y

Y

Y

Y

Y

Y

Y

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

McASP0 and McASP2 Transmit Master Clock

McASP0 MUTE Output

McASP1 MUTE Output

McASP1 Transmit Master Clock

McASP1 Transmit Bit Clock

McASP1Receive Bit Clock

McASP1 Transmit Frame Sync (L/R Clock)

McASP1Receive Frame Sync (L/R Clock)

Device reset pin

Alternate clock input (3.3-V LVCMOS Input)

Test mode Select

Test Reset

Oscillator Vss tap point (for filter only)

1.2-V Oscillator Input

1.2-V Oscillator Output

Oscillator 1.2-V Vpp tap point (for filter only)

PLL 3.3-V Supply Input (requires external filter)

Test Data In

Test Data Out

Emulation Pin 0

Emulation Pin 1

Test Clock

SDRAM Column Address Strobe

SDRAM Write Enable

Write Enable or Byte Enable for EM_D[7:0]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

EMIF Data Bus [lower 16 Bits]

PIN NO. SIGNAL NAME TYPE

(1)

PULL

(2)

GPIO

(3)

DESCRIPTION

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