Yamaha R-V702 R-V502 User Manual download pdf (Page 9)

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Circuit Description

2-5

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2-2-5. Memory

This system uses SHARP's memory, LRS18B0.

It is consisted of 256M bits flash memory and 64M bits SCRAM. It has 16 bit data line, D[0~15] which is connected to

trident, LCD or CSP2200. It has 23 bit address lines, A[1~23]. They are also connected. CP_CSROMEN signal, chip

select signal in the trident, enable flash memories. They use supply voltages, VCCD and VCC_1.8A.

During wrting process, CP_WEN is low and it enables writing process to flash memory and SCRAM. During reading

process, CP_OEN is low and it output information which is located at the address from the trident in the flash memory or

SCRAM to data lines. Each chip select signals in the trident select flash memory or SCRAM. Reading or writing

procedure is processed after CP_WEN or CP_OEN is enabled. Memories use FLASH_RESET, which is buffered signal of

RESET from CSP2200, for ESD protection. A[0] signal enables lower byte of SCRAM and UPPER_BYTE signal enables

higher byte of SCRAM.

2-2-6. Trident

Trident is consisted of ARM core and DSP core. It has 20K*16bits RAM 144K*16bits ROM in the DSP. It has

4K*32bits ROM and 2K*32bits RAM in the ARM core. DSP is consisted of timer, one bit input/output unit(BIO), JTAG,

EMI and HDS(Hardware Development System). ARM core is consisted of EMI, PIC(Programmable Interrupt Controller),

reset/power/clock unit, DMA controller, TIC(Test Interface Controller), peripheral bridge, PPI, SSI(Synchronous Serial

Interface), ACCs(Asynchronous communications controllers), timer, ADC, RTC(Real-Time Clock) and keyboard interface.

DSP_AB[0~8], address lines of DSP core and DSP_DB[0~15], data lines of DSP core are connected to CSP2200. A[0~20],

address lines of ARM core and D[0~15], data lines of ARM core are connected to memory, LCD and YMU762.

ICP(Interprocessor Communication Port) controls the communication between ARM core and DSP core.

CSROMEN, CSRAMEN and CS1N to CS4N in the ARM core are connected to each memory. WEN and OEN control the

process of memory. External IRQ(Interrupt ReQuest) signals from each units, such as, YMU, Ear-jack, Ear-mic and

CSP1093, need the compatible process.

Some PPI pins has many special functions. CP_KB[0~9] receive the status from key FPCB and are used for the

communications using data link cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).

And UP_CS/SCLK/SDI, control signals for CSP2200 are outputted through PPI pins. It has signal port for

charging(CHG_DET), SIM_RESET and FLIP_SNS with which we knows open.closed status of folder. It has JTAG control

pins(TDI/TDO/TCK) for ARM core and DSP core. It recieves 13MHz clock in CKI pin from external TCXO and receives

32.768KHz clock from X1RTC. ADC(Analog to Digital Convertor) part receives the status of temperature, battery type and

battery voltage. And control signals(DSP_INT, DSP_IO and DSP_RWN) for DSP core are used. It enables main LCD with

DSP IP pins.

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Yamaha R-V702 R-V502 User Manual Page 9