Yamaha R-V702 R-V502 User Manual download pdf (Page 9)

SAMSUNG Proprietary-Contents may change without notice

Circuit Description

This Document can not be used without Samsung's authorization

2-5

CS_NAND, NCSRAM, NCSFLASH in the ARM core are connected to each memory. HWR_N and HRD_N control the

process of memory. External IRQ(Interrupt ReQuest) signals from each units, such as, PMU need the compatible process.

KBIO[0~7] receive the status from key and RXD0/TXD0/irDA_DOWN are used for the communicatios using IRDA and

data link cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).

It has JTAG control pins(TDI/TDO/TCK) for ARM core and DSP core. It recieves 13MHz clock in CKI pin from

external TCXO. ADC(Analog to Digital Convertor) part receives the status of temperature, battery type and battery voltage.

. Camera DSP (MV317SAQ)

Tiger is an Integrated circuit for mobile phone camera. This structure will allow effectiveness for large data management

and significantly reduces main processor will get burden.

In hence, Tiger will allow the user to be able to display to LCD direct without burdening the main processor. It also

allows to have various kinds of display size on the LCD and snapshot for Jpeg. Digital effect will also be executed on

real time base resulting Tiger as being a video co-processor in the mobile platform.

Also,an i80 type processor’ s 16bit parallel interface of Tiger makes it available for the CPU to interchange the data with

Tiger. As the additional 8Mbit is usable except 2Mbit buffer embedded in Tiger, the diverse UI data processing which is

not a burden to the CPU is available. JPEG encoder and decoder are baseline ISO/IEC 10918-1 JPEG compliance

(DCT-based). JPEG decoder supports YUV444, YUV422, YUV420 and YUV411 format standard JPEG image.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 43 44

No comments

Yamaha R-V702 R-V502 User Manual Page 9