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Yamaha MDR-2P Service Manual Page 30

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30
NW-A805/A806/A808/NWZ-A815/A816/A818
• IC Pin Function Description
MAIN BOARD IC302 CS42L51-CNZR (A/D CONVERTER, D/A CONVERTER)
Pin No. Pin Name I/O Description
1
LRCK
I/O
L/R sampling clock signal input/output with the system controller
2
SDA/CDIN
I/O
I2C mode : Serial date input/output with the system controller
SPI mode : Serial date input from the system controller
3
SCL/CCLK I Serial data transfer clock signal input from the system controller
4
AD0/nCS I
I2C mode : Address signal input from the system controller
SPI mode : Chip select signal input from the system controller
5 VA_HP -
Power supply terminal (+1.8V)
6
FLYP I Connected to the external charge pump capacitor (positive node)
7
GND_HP - Ground terminal
8
FLYN I Connected to the external charge pump capacitor (negative node)
9
VSS_HP - Connected to the capacitor for the internal analog headphone section
10
AOUTB O R-ch analog audio signal output to the headphone and WM-port
11
AOUTA O L-ch analog audio signal output to the headphone and WM-port
12
VA - Power supply terminal (+1.8V)
13
AGND - Ground terminal
14
DAC_FILT+ - Not used
15
VQ - Not used
16
ADC_FILT+ - Not used
17
MICIN1/AIN3A I Analog audio signal input terminal Not used
18
MICIN2/AIN3B/
BIAS
IAnalog audio signal input terminal Not used
19
AIN2A I Analog audio signal input terminal Not used
20
AIN2B/BIAS I Analog audio signal input terminal Not used
21 AFILTA -
Not used
22 AFILTB -
Not used
23 AIN1A I
L-ch analog audio signal input from the WM-port
24
AIN1B I R-ch analog audio signal input from the WM-port
25 nRESET I
Reset signal input from the system controller
26
VL - Power supply terminal
27
VD - Power supply terminal (+1.8V)
28
DGND - Ground terminal
29
SDOUT O Serial audio date output to the system controller
30
MCLK I Master clock signal input from the system controller
31
SCLK O Serial clock signal output to the system controller
32
SDIN I Serial audio date input from the system controller
33
AGND - Ground terminal
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